I2C Bus


Contents: Inter Integrated Circuit bus
Benefits
Features
Examples
Designer benefits
Terminology
Multi-master
Device connection
Bit transfer
START and STOP conditions
Data transfer
Acknowledge
Clock synchronization
Arbitration
A complete data transfer

Inter Integrated Circuit bus

Philips Semiconductors

I2C-BUS SPECIFICATION VERSION 2.1 JANUARY 2000

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BENEFITS DESIGNERS AND MANUFACTURERS 

there are often many similarities between seemingly unrelated designs.

For example, nearly every system includes:

To exploit these similarities to the benefit of both systems designers and equipment manufacturers, as well as to maximize hardware efficiency and circuit simplicity, Philips developed a simple bi-directional 2-wire bus for efficient inter-IC control.

This bus is called the Inter IC or I2C-bus.

At present, Philips’ IC range includes more than 150 CMOS and bipolar I2C-bus compatible types for performing functions in all three of the previously mentioned categories.

All I2C-bus compatible devices incorporate an on-chip interface which allows them to communicate directly with each other via the I2C-bus.

This design concept solves the many interfacing problems encountered when designing digital control circuits.

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Features

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Examples of I2C-bus applications. 

TV set

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DECT Cordless phone base station

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Designer benefits 

I2C-bus compatible ICs allow a system design to rapidly progress directly from a functional block diagram to a prototype.

Moreover, since they ‘clip’ directly onto the I 2 C-bus without any additional external interfacing, they allow a prototype system to be modified or upgraded simply by ‘clipping’ or ‘unclipping’ ICs to or from the bus.

Here are some of the features of I2C-bus compatible ICs which are particularly attractive to designers:

In addition to these advantages, the CMOS ICs in the I2C-bus compatible range offer designers special features which are particularly attractive for portable equipment and battery-backed systems.

They all have: 

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Terminology

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Multi-master bus

 

Fig.2  Example of an I 2 C-bus configuration using two microcontrollers.

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Device connections

Fig.3 Connection of Standard- and Fast-mode devices to the I2C-bus.

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Bit transfer

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Fig.4 Bit transfer on the I2C-bus.

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START and STOP conditions

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Fig.5 START and STOP conditions.

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Data transfer

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Fig.6 Data transfer on the I2C-bus.

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Acknowledge

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Fig.7 Acknowledge on the I2C-bus.

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Clock synchronization

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Fig.8 Clock synchronization during the arbitration procedure.

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Arbitration

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Fig.9 Arbitration procedure of two masters.

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A complete data transfer

Bus signal representation

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Fig.10 A complete data transfer.

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Logical data representation

Read and write operations

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Write data

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Fig.11 A master-transmitter addressing a slave receiver with a 7-bit address.

The transfer direction is not changed.

Read data

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Fig.12 A master reads a slave immediately after the first byte.

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EB Last updated on 10 January 2003